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ICCD
2007
IEEE
132views Hardware» more  ICCD 2007»
16 years 3 months ago
Post-layout comparison of high performance 64b static adders in energy-delay space
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
Sheng Sun, Carl Sechen
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
16 years 3 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku
ICCAD
2007
IEEE
116views Hardware» more  ICCAD 2007»
16 years 3 months ago
Device and architecture concurrent optimization for FPGA transient soft error rate
Late CMOS scaling reduces device reliability, and existing work has studied the permanent SER (soft error rate) for configuration memory in FPGA extensively. In this paper, we sh...
Yan Lin, Lei He
ICCAD
2005
IEEE
90views Hardware» more  ICCAD 2005»
16 years 3 months ago
Scalable compositional minimization via static analysis
State-equivalence based reduction techniques, e.g. bisimulation minimization, can be used to reduce a state transition system to facilitate subsequent verification tasks. However...
Fadi A. Zaraket, Jason Baumgartner, Adnan Aziz
PLPV
2010
ACM
16 years 3 months ago
Resource typing in Guru
This paper presents a resource typing framework for the Guru d-programming language, in which abstractions for various kinds of program resources can be defined. Implemented exam...
Aaron Stump, Evan Austin