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ASPDAC
1999
ACM
60views Hardware» more  ASPDAC 1999»
15 years 11 months ago
Timing Optimization of Logic Network Using Gate Duplication
We present a timing optimization algorithm based on the concept of gate duplication on the technologydecomposed network. We first examine the relationship between gate duplication...
Chun-hong Chen, Chi-Ying Tsui
ICCAD
1999
IEEE
93views Hardware» more  ICCAD 1999»
15 years 11 months ago
LEOPARD: a Logical Effort-based fanout OPtimizer for ARea and Delay
We present LEOPARD, a fanout optimization algorithm based on the effort delay model for near-continuous size buffer libraries. Our algorithm minimizes area under required timing a...
Peyman Rezvani, Amir H. Ajami, Massoud Pedram, Ham...
IJCAI
2007
15 years 8 months ago
The Logic Behind Weighted CSP
We define a translation from Weighted CSP to signed Max-SAT, and a complete resolution-style calculus for solving signed Max-SAT. Based on these results, we then describe an orig...
Carlos Ansótegui, Maria Luisa Bonet, Jordi ...
EUSFLAT
2001
122views Fuzzy Logic» more  EUSFLAT 2001»
15 years 8 months ago
The alliance of global navigation satellite systems and fuzzy logic in unmanned cars
This paper presents a fuzzy control application in the unmanned driving field. Two electric cars have been conveniently instrumented in order to transform them in platforms for au...
Teresa de Pedro, Ricardo García Rosa, Carlo...
KIVS
2011
Springer
14 years 9 months ago
Alister 2.0 - Programmable Logic Controllers in Railway Interlocking Systems for Regional Lines of the DB Netze AG
Railway interlockings are dominated by highly proprietary systems. We present the development project Alister 2.0 – an interlocking system based on industry-proven standard comp...
Reiner Saykowski, Elferik Schultz, Joachim Bleidie...