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APCCAS
2006
IEEE
296views Hardware» more  APCCAS 2006»
16 years 26 days ago
2PADCL: Two Phase drive Adiabatic Dynamic CMOS Logic
Abstract— This paper proposes a novel two-phase drive adiabatic dynamic CMOS logic circuit (2PADCL). The proposed 2PADCL uses two complementary sinusoidal power supply clocks and...
Yasuhiro Takahashi, Youhei Fukuta, Toshikazu Sekin...
CSL
2005
Springer
16 years 9 days ago
Distributed Control Flow with Classical Modal Logic
In previous work we presented a foundational calculus for spatially distributed computing based on intuitionistic modal logic. With the modalities P and Q we were able to capture t...
Tom Murphy VII, Karl Crary, Robert Harper
155
Voted
PATMOS
2004
Springer
16 years 4 days ago
Physical Extension of the Logical Effort Model
Abstract. The logical effort method has appeared very convenient for fast estimation and optimization of single paths. However it necessitates a calibration of all the gates of the...
B. Lasbouygues, Robin Wilson, Philippe Maurine, Na...
STACS
2010
Springer
15 years 12 months ago
Decidability of the Interval Temporal Logic ABB over the Natural Numbers
In this paper, we focus our attention on the interval temporal logic of the Allen’s relations “meets”, “begins”, and “begun by” (ABB for short), interpreted over natu...
Angelo Montanari, Pietro Sala, Guido Sciavicco
AUSAI
1999
Springer
15 years 11 months ago
Computing Least Common Subsumers in Expressive Description Logics
Computing least common subsumers in description logics is an important reasoning service useful for a number of applications. As shown in the literature, this reasoning service ca...
Thomas Mantay