This paper derives a methodology for developing accurate convex delay models to be used for transistor sizing. A new rich class of convex functions to model gate delay is presente...
Mahesh Ketkar, Kishore Kasamsetty, Sachin S. Sapat...
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuit...
As encoding spatial information into mutual information (MI) can improve the nonrigid registration against bias fields where the conventional MI is challenged, we propose to unify ...
In this paper, we present a robust feature extraction framework based on informationtheoretic learning. Its formulated objective aims at simultaneously maximizing the Renyi's...
We propose a class of graphical models appropriate for structure prediction problems where the model structure is a function of the output structure. Incremental Sigmoid Belief Ne...