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RTSS
2009
IEEE
16 years 28 days ago
Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores
—Memory accesses form an important source of timing unpredictability. Timing analysis of real-time embedded software thus requires bounding the time for memory accesses. Multipro...
Yan Li, Vivy Suhendra, Yun Liang, Tulika Mitra, Ab...
HPCA
1998
IEEE
15 years 10 months ago
PRISM: An Integrated Architecture for Scalable Shared Memory
This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....
Kattamuri Ekanadham, Beng-Hong Lim, Pratap Pattnai...
CLUSTER
2009
IEEE
16 years 29 days ago
Integrating software distributed shared memory and message passing programming
Abstract—Software Distributed Shared Memory (SDSM) systems provide programmers with a shared memory programming environment across distributed memory architectures. In contrast t...
H'sien J. Wong, Alistair P. Rendell
WIDM
2006
ACM
16 years 4 days ago
An architecture for creating collaborative semantically capable scientific data sharing infrastructures
Increasingly, scientists are seeking to collaborate and share data among themselves. Such sharing is can be readily done by publishing data on the World-Wide Web. Meaningful query...
Anuj R. Jaiswal, C. Lee Giles, Prasenjit Mitra, Ja...
MAM
2002
151views more  MAM 2002»
15 years 5 months ago
A performance evaluation of cache injection in bus-based shared memory multiprocessors
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...
Aleksandar Milenkovic, Veljko M. Milutinovic