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IPPS
2006
IEEE
16 years 23 days ago
Towards building a highly-available cluster based model for high performance computing
In recent years, we have witnessed a growing interest in high performance computing (HPC) using a cluster of workstations. However, many challenges remain to be resolved before th...
Azzedine Boukerche, Raed Al-Shaikh, Mirela Sechi M...
IPPS
2006
IEEE
16 years 23 days ago
ReConfigME: a detailed implementation of an operating system for reconfigurable computing
Reconfigurable computing applications have traditionally had the exclusive use of the field programmable gate array, primarily because the logic densities of the available devices...
Grant B. Wigley, David A. Kearney, Mark Jasiunas
IPPS
2006
IEEE
16 years 23 days ago
Parallel morphological processing of hyperspectral image data on heterogeneous networks of computers
Recent advances in space and computer technologies are revolutionizing the way remotely sensed data is collected, managed and interpreted. The development of efficient techniques ...
Antonio J. Plaza
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
16 years 23 days ago
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmo...
ISQED
2006
IEEE
107views Hardware» more  ISQED 2006»
16 years 23 days ago
Impact of Gate-Length Biasing on Threshold-Voltage Selection
Gate-length biasing is a runtime leakage reduction technique that leverages on the short-channel effect by marginally increasing the gate-length of MOS devices to significantly ...
Andrew B. Kahng, Swamy Muddu, Puneet Sharma