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VLSID
2008
IEEE
150views VLSI» more  VLSID 2008»
16 years 6 months ago
PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Nik...
IPPS
2007
IEEE
16 years 22 days ago
A Peer-to-Peer Infrastructure for Autonomous Grid Monitoring
Modern grids have become very complex by their size and their heterogeneity. It makes the deployment and maintenance of systems a difficult task requiring lots of efforts from ad...
Laurent Baduel, Satoshi Matsuoka
VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
16 years 7 months ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...
IWCMC
2009
ACM
16 years 28 days ago
Performance analysis and adaptive power control for block coded collaborative networks
We derive theoretical bit and frame error rate expressions for decode-and-forward (DF) collaborative networks containing M users, employing a variety of block codes over a Rayleig...
W. Guo, Ioannis Chatzigeorgiou, Ian J. Wassell, Ro...
IPPS
2002
IEEE
15 years 11 months ago
Utilization-Based Heuristics for Statically Mapping Real-Time Applications onto the HiPer-D Heterogeneous Computing System
Real-time applications continue to increase in importance as they are employed in various critical areas, such as command and control systems. These applications have traditionall...
Shoukat Ali, Jong-Kook Kim, Yang Yu, Shriram B. Gu...