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ICASSP
2010
IEEE
15 years 7 months ago
Buffer management for multi-application image processing on multi-core platforms: Analysis and case study
Due to the limited amounts of on-chip memory, large volumes of data, and performance and power consumption overhead associated with interprocessor communication, efficient managem...
Dong-Ik Ko, Nara Won, Shuvra S. Bhattacharyya
CASES
2005
ACM
15 years 8 months ago
Software-directed power-aware interconnection networks
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
Vassos Soteriou, Noel Eisley, Li-Shiuan Peh
IEEEPACT
2005
IEEE
16 years 10 days ago
Memory Coloring: A Compiler Approach for Scratchpad Memory Management
Scratchpad memory (SPM), a fast software-managed onchip SRAM, is now widely used in modern embedded processors. Compared to hardware-managed cache, it is more efficient in perfor...
Lian Li 0002, Lin Gao 0002, Jingling Xue
CLUSTER
2004
IEEE
15 years 10 months ago
Management of grid jobs and data within SAMGrid
When designing SAMGrid, a project for distributing high-energy physics computations on a grid, we discovered that it was challenging to decide where to place user's jobs. Job...
A. Baranovski, Gabriele Garzoglio, Igor Terekhov, ...
DSN
2002
IEEE
15 years 11 months ago
Model Checking Performability Properties
Model checking has been introduced as an automated technique to verify whether functional properties, expressed in a formal logic like computational tree logic (CTL), do hold in a...
Boudewijn R. Haverkort, Lucia Cloth, Holger Herman...