4166 search results - page 666 / 834 » Automating the constraining process |
138
click to vote
DAC
2005
ACM
16 years 7 months ago
2005
ACM
This paper presents an optimal procrastinating voltage scheduling (OP-DVS) for hard real-time systems using stochastic workload information. Algorithms are presented for both sing...
159
click to vote
DAC
2006
ACM
16 years 7 months ago
2006
ACM
Modern integrated circuits require careful attention to the soft-error rate (SER) resulting from bit upsets, which are normally caused by alpha particle or neutron hits. These eve...
188
click to vote
DAC
2006
ACM
16 years 7 months ago
2006
ACM
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
159
click to vote
DAC
2006
ACM
16 years 7 months ago
2006
ACM
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...
159
click to vote
DAC
2006
ACM
16 years 7 months ago
2006
ACM
Increasing source voltage (Source-Biasing) is an efficient technique for reducing gate and sub-threshold leakage of SRAM arrays. However, due to process variation, a higher source...