12745 search results - page 339 / 2549 » Automating test automation |
202
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ISVLSI
2007
IEEE
16 years 1 months ago
2007
IEEE
— We present a performance analysis of CoDeL, a highly efficient automated clock gating platform for rapidly developing power efficient hardware architectures. It automatically...
157
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GTTSE
2007
Springer
16 years 26 days ago
2007
Springer
Abstract. Feature Models (FMs) are a key artifact for variability and commonality management in Software Product Lines (SPLs). In this context, the merging of FMs is being recogniz...
148
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POLICY
2007
Springer
16 years 25 days ago
2007
Springer
In this paper we describe an approach to the problem of automated policy generation for mobile ad hoc networks. The automated policy generation problem is difficult in its own rig...
163
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ACSD
2005
IEEE
16 years 10 days ago
2005
IEEE
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
163
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APSEC
2005
IEEE
16 years 10 days ago
2005
IEEE
Distributed infrastructures are becoming more and more diverse in nature. An application may often need to be redeployed in various scenarios. Ideally, given an application design...