3914 search results - page 487 / 783 » Automating SLA modeling |
190
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FMCAD
2007
Springer
15 years 10 months ago
2007
Springer
Parameterized heuristics abound in computer aided design and verification, and manual tuning of the respective parameters is difficult and time-consuming. Very recent results from ...
184
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GLVLSI
2009
IEEE
15 years 10 months ago
2009
IEEE
Design debug remains one of the major bottlenecks in the VLSI design cycle today. Existing automated solutions strive to aid engineers in reducing the debug effort by identifying ...
203
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CSL
2006
Springer
15 years 10 months ago
2006
Springer
Separation Logic is a sub-structural logic that supports local reasoning for imperative programs. It is designed to elegantly describe sharing and aliasing properties of heap struc...
202
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DEON
2006
Springer
15 years 10 months ago
2006
Springer
In this paper we extend earlier work on deontic deadlines in CTL to the framework of alternating time temporal logic (ATL). The resulting setting enables us to model several concep...
192
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EWCBR
2006
Springer
15 years 10 months ago
2006
Springer
The success of a company more and more depends on its ability to flexibly and quickly react to changes. Combining process management techniques and conversational case-based reason...