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DAC
2005
ACM
16 years 7 months ago
A lattice-based framework for the classification and design of asynchronous pipelines
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...
Peggy B. McGee, Steven M. Nowick
DAC
2006
ACM
16 years 7 months ago
Architecture-aware FPGA placement using metric embedding
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
Padmini Gopalakrishnan, Xin Li, Lawrence T. Pilegg...
195
Voted
DAC
2006
ACM
16 years 7 months ago
Optimal simultaneous mapping and clustering for FPGA delay optimization
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
Joey Y. Lin, Deming Chen, Jason Cong
162
Voted
MICCAI
2006
Springer
16 years 7 months ago
Probabilistic Brain Atlas Encoding Using Bayesian Inference
This paper addresses the problem of creating probabilistic brain atlases from manually labeled training data. We propose a general mesh-based atlas representation, and compare diff...
Koen Van Leemput
ICSE
2008
IEEE-ACM
16 years 7 months ago
Incremental state-space exploration for programs with dynamically allocated data
We present a novel technique that speeds up state-space exploration (SSE) for evolving programs with dynamically allocated data. SSE is the essence of explicit-state model checkin...
Steven Lauterburg, Ahmed Sobeih, Darko Marinov, Ma...
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