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ISSTA
1998
ACM
15 years 11 months ago
On the Limit of Control Flow Analysis for Regression Test Selection
Automated analyses for regression test selection (RTS) attempt to determine if a modified program, when run on a test t, will have the same behavior as an old version of the prog...
Thomas Ball
DAC
2003
ACM
16 years 7 months ago
Coverage directed test generation for functional verification using bayesian networks
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...
Shai Fine, Avi Ziv
ICLP
2009
Springer
16 years 7 months ago
Integrating Software Testing and Run-Time Checking in an Assertion Verification Framework
Abstract. We present a framework that unifies unit testing and runtime verification (as well as static verification and static debugging). A key contribution of our overall approac...
Edison Mera, Manuel V. Hermenegildo, Pedro L&oacut...
AGILEDC
2007
IEEE
16 years 1 months ago
On the Sustained Use of a Test-Driven Development Practice at IBM
Test-Driven Development (TDD) is an agile practice that is widely accepted and advocated by most agile methods and methodologists. In this paper, we report on a post hoc analysis ...
Julio Cesar Sanchez, Laurie A. Williams, E. Michae...
DATE
2000
IEEE
136views Hardware» more  DATE 2000»
15 years 11 months ago
On Applying Incremental Satisfiability to Delay Fault Testing
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
Joonyoung Kim, Jesse Whittemore, Karem A. Sakallah...