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FMCAD
2007
Springer
15 years 10 months ago
A Mechanized Refinement Framework for Analysis of Custom Memories
We present a framework for formal verification of embedded custom memories. Memory verification is complicated ifficulty in abstracting design parameters induced by the inherently ...
Sandip Ray, Jayanta Bhadra
FPL
2004
Springer
143views Hardware» more  FPL 2004»
15 years 10 months ago
Exploring Area/Delay Tradeoffs in an AES FPGA Implementation
Abstract. Field-Programmable Gate Arrays (FPGAs) have lately become a popular target for implementing cryptographic block ciphers, as a well-designed FPGA solution can combine some...
Joseph Zambreno, David Nguyen, Alok N. Choudhary
175
Voted
FPL
2008
Springer
138views Hardware» more  FPL 2008»
15 years 8 months ago
An efficient run-time router for connecting modules in FPGAS
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
Jorge Surís, Cameron Patterson, Peter Athan...
176
Voted
CGVR
2008
15 years 8 months ago
River and Coastal Action in Automatic Terrain Generation
- The erosive action of rivers and seas has immense influence on the appearance of the physical landscape. However, the creation of several important river and coastal features are...
Soon Tee Teoh
AC
2005
Springer
15 years 6 months ago
Software model checking with SPIN
The aim of this chapter is to give an overview of the theoretical foundation and the practical application of logic model checking techniques for the verification of multi-threade...
Gerard J. Holzmann