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DAC
2001
ACM
16 years 7 months ago
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshmi...
DAC
2005
ACM
16 years 7 months ago
MP core: algorithm and design techniques for efficient channel estimation in wireless applications
Channel estimation and multiuser detection are enabling technologies for future generations of wireless applications. However, sophisticated algorithms are required for accurate c...
Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timoth...
DAC
2001
ACM
16 years 7 months ago
Hypermedia-Aided Design
Recently, the Internet revolutionized many activities from entertainment to marketing and business. Two key underlying Internet technologies, efficient data delivery and hypertext...
Darko Kirovski, Milenko Drinic, Miodrag Potkonjak
EUROSYS
2010
ACM
16 years 23 days ago
PUSH: A Dataflow Shell
The deluge of huge data sets such as those provided by sensor networks, online transactions, and the web provide exciting opportunities for data analysis. The scale of the data ...
Noah Evans, Eric Van Hensbergen
FPGA
2003
ACM
138views FPGA» more  FPGA 2003»
15 years 12 months ago
Automatic transistor and physical design of FPGA tiles from an architectural specification
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...