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DAC
2002
ACM
16 years 7 months ago
A general probabilistic framework for worst case timing analysis
CT The traditional approach to worst-case static-timing analysis is becoming unacceptably conservative due to an ever-increasing number of circuit and process effects. We propose a...
Michael Orshansky, Kurt Keutzer
DAC
2003
ACM
16 years 7 months ago
A transformation based algorithm for reversible logic synthesis
A digital combinational logic circuit is reversible if it maps each input pattern to a unique output pattern. Such circuits are of interest in quantum computing, optical computing...
D. Michael Miller, Dmitri Maslov, Gerhard W. Dueck
DAC
2003
ACM
16 years 7 months ago
Using a formal specification and a model checker to monitor and direct simulation
We describe a technique for verifying that a hardware design correctly implements a protocol-level formal specification. Simulation steps are translated to protocol state transiti...
Serdar Tasiran, Yuan Yu, Brannon Batson
DAC
2004
ACM
16 years 7 months ago
Large-scale full-wave simulation
We describe a new extraction tool, EMX (Electro-Magnetic eXtractor), for the analysis of RF, analog and high-speed digital circuits. EMX is a fast full-wave field solver. It incor...
Sharad Kapur, David E. Long
DAC
2004
ACM
16 years 7 months ago
Synthesizing interconnect-efficient low density parity check codes
Error correcting codes are widely used in communication and storage applications. Codec complexity has usually been measured with a software implementation in mind. A recent hardw...
Marghoob Mohiyuddin, Amit Prakash, Adnan Aziz, Way...