4359 search results - page 501 / 872 » Automated Pipeline Design |
186
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VISUALIZATION
2000
IEEE
15 years 11 months ago
2000
IEEE
Very large irregular-grid data sets are represented as tetrahedral meshes and may incur significant disk I/O access overhead in the rendering process. An effective way to allevia...
163
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ISCA
1999
IEEE
15 years 11 months ago
1999
IEEE
Providing adequate data bandwidth is extremely important for a wide-issue superscalar processor to achieve its full performance potential. Adding a large number of ports to a data...
174
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ICS
1999
Tsinghua U.
15 years 11 months ago
1999
Tsinghua U.
Current high-end parallel systems achieve low-latency, highbandwidth network communication through the use of aggressive design techniques and expensive mechanical and electrical ...
180
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IPPS
1998
IEEE
15 years 11 months ago
1998
IEEE
Switch-based interconnects are used in a number of application domains including parallel system interconnects, local area networks, and wide area networks. However, very few swit...
236
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CAV
1998
Springer
15 years 11 months ago
1998
Springer
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...