4359 search results - page 463 / 872 » Automated Pipeline Design |
202
click to vote
MICRO
2008
IEEE
16 years 1 months ago
2008
IEEE
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
175
click to vote
MICRO
2008
IEEE
16 years 1 months ago
2008
IEEE
Scaling of CMOS feature size has long been a source of dramatic performance gains. However, the reduction in voltage levels has not been able to match this rate of scaling, leadin...
225
click to vote
INFOCOM
2007
IEEE
16 years 1 months ago
2007
IEEE
Abstract—Deep packet inspection (DPI) is often used in network intrusion detection and prevention systems (NIDPS), where incoming packet payloads are compared against known attac...
196
click to vote
INFOCOM
2007
IEEE
16 years 1 months ago
2007
IEEE
— The input-queued switch architecture is widely used in Internet routers due to its ability to run at very high line speeds. A central problem in designing an input-queued switc...
183
click to vote
IPPS
2006
IEEE
16 years 26 days ago
2006
IEEE
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...