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166
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ICDE
2010
IEEE
16 years 1 months ago
2010
IEEE
— Information extraction systems are traditionally implemented as a pipeline of special-purpose processing modules. A major drawback of such an approach is that whenever a new ex...
170
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IPPS
2009
IEEE
16 years 1 months ago
2009
IEEE
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...
181
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
In the absence of a single module interface standard, integration of pre-designed modules in System-on-Chip design often requires the use of protocol converters. Existing approach...
199
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IPPS
2007
IEEE
16 years 1 months ago
2007
IEEE
Modern multi-core architectures have become popular because of the limitations of deep pipelines and heating and power concerns. Some of these multi-core architectures such as the...
210
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ISCAS
2007
IEEE
16 years 1 months ago
2007
IEEE
Abstract—This paper presents a low power 4-bit ADC for subGHz Ultra Wideband (UWB) receivers. The power efficiency is achieved by taking advantage of the low duty cycle feature o...