4359 search results - page 379 / 872 » Automated Pipeline Design |
170
click to vote
DAC
2000
ACM
16 years 7 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
197
click to vote
DAC
2001
ACM
16 years 7 months ago
2001
ACM
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
185
click to vote
DAC
2005
ACM
16 years 7 months ago
2005
ACM
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
174
click to vote
DAC
2005
ACM
16 years 7 months ago
2005
ACM
Channel estimation and multiuser detection are enabling technologies for future generations of wireless applications. However, sophisticated algorithms are required for accurate c...
235
click to vote
VLSID
2009
IEEE
16 years 7 months ago
2009
IEEE
Many system-level design tasks (e.g. timing analysis, hardware/software partitioning and design space exploration) involve computational kernels that are intractable (usually NP-ha...