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DATE
2005
IEEE
152views Hardware» more  DATE 2005»
16 years 14 days ago
Design of Fault-Tolerant and Dynamically-Reconfigurable Microfluidic Biochips
Technology Roadmap for Semiconductors (ITRS) clearly identifies the integration of electrochemical and electrobiological techniques as one of the system-level design challenges tha...
Fei Su, Krishnendu Chakrabarty
ELECTRONICMARKETS
2011
140views more  ELECTRONICMARKETS 2011»
15 years 1 months ago
Reaching into patients' homes - participatory designed AAL services - The case of a patient-centered nutrition tracking service
Abstract Ambient Assisted Living (AAL) offers possibilities for promising new IT-based health care services that are resulting in new challenges for its design process. We introduc...
Philipp Menschner, Andreas Prinz, Philip Koene, Fe...
CODES
2008
IEEE
16 years 1 months ago
Distributed flit-buffer flow control for networks-on-chip
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
Nicola Concer, Michele Petracca, Luca P. Carloni
PLDI
2011
ACM
14 years 9 months ago
Caisson: a hardware description language for secure information flow
Information flow is an important security property that must be incorporated from the ground up, including at hardware design time, to provide a formal basis for a system’s roo...
Xun Li 0001, Mohit Tiwari, Jason Oberg, Vineeth Ka...
ICCAD
2003
IEEE
144views Hardware» more  ICCAD 2003»
16 years 3 months ago
A High-level Interconnect Power Model for Design Space Exploration
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
Pallav Gupta, Lin Zhong, Niraj K. Jha