4359 search results - page 358 / 872 » Automated Pipeline Design |
185
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CIKM
2003
Springer
16 years 1 days ago
2003
Springer
In this paper, we describe a graphical workflow management system called HyperThesis to address the challenges of integrating bioinformatics applications. HyperThesis is an integ...
169
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FPL
2001
Springer
15 years 11 months ago
2001
Springer
This paper presents parameterized module-generators for pipelined function evaluation using lookup tables, adders, shifters and multipliers. We discuss trade-offs involved between...
133
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ITC
2000
IEEE
15 years 11 months ago
2000
IEEE
—This paper presents Algorithm-level REcomputing with Shifted Operands (ARESO), which is a new register transfer (RT) level time redundancy-based concurrent error detection (CED)...
159
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CHES
2000
Springer
15 years 11 months ago
2000
Springer
The presented Triple-DES encryptor is a single-chip solution to encrypt network communication. It is optimized for throughput and fast switching between virtual connections like fo...
189
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GLVLSI
1998
IEEE
15 years 11 months ago
1998
IEEE
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...