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DAC
2005
ACM
15 years 8 months ago
Logic soft errors in sub-65nm technologies design and CAD challenges
Logic soft errors are radiation induced transient errors in sequential elements (flip-flops and latches) and combinational logic. Robust enterprise platforms in sub-65nm technolog...
Subhasish Mitra, Tanay Karnik, Norbert Seifert, Mi...
EUROPLOP
2006
15 years 8 months ago
Supporting the Selection of Design Patterns by Formal Definition and Considering Semantics
Extensibility and maintainability of software becomes more an issue as the complexity of the software development process rises. Design patterns in the sense of Gamma et al. [3] a...
Klaus Meffert
DAC
2001
ACM
16 years 7 months ago
Speculation Techniques for High Level Synthesis of Control Intensive Designs
The quality of synthesis results for most high level synthesis approaches is strongly a ected by the choice of control ow through conditions and loops in the input description. In...
Sumit Gupta, Nick Savoiu, Sunwoo Kim, Nikil D. Dut...
DAC
2002
ACM
16 years 7 months ago
Communication architecture based power management for battery efficient system design
Communication-based power management (CBPM) is a new batterydriven system-level power management methodology in which the systemlevel communication architecture regulates the exec...
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
DAC
2002
ACM
16 years 7 months ago
Timed compiled-code simulation of embedded software for performance analysis of SOC design
In this paper, a new timing generation method is proposed for the performance analysis of embedded software. The time stamp generation of I/O accesses is crucial to performance es...
Jong-Yeol Lee, In-Cheol Park