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DAC
2008
ACM
16 years 7 months ago
Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array fo
: Spin-Torque Transfer Magnetic RAM (STT MRAM) is a promising candidate for future universal memory. It combines the desirable attributes of current memory technologies such as SRA...
Jing Li, Charles Augustine, Sayeef S. Salahuddin, ...
DAC
2002
ACM
16 years 7 months ago
Transformation rules for designing CNOT-based quantum circuits
This paper gives a simple but nontrivial set of local transformation rules for Control-NOT(CNOT)-based combinatorial circuits. It is shown that this rule set is complete, namely, ...
Kazuo Iwama, Yahiko Kambayashi, Shigeru Yamashita
DAC
2002
ACM
16 years 7 months ago
Compiler-directed scratch pad memory hierarchy design and management
One of the primary challenges in embedded system design is designing the memory hierarchy and restructuring the application to take advantage of it. This task is particularly impo...
Mahmut T. Kandemir, Alok N. Choudhary
DAC
2005
ACM
16 years 7 months ago
Simulation based deadlock analysis for system level designs
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...
Xi Chen, Abhijit Davare, Harry Hsieh, Alberto L. S...
DAC
2006
ACM
16 years 7 months ago
A new LP based incremental timing driven placement for high performance designs
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
Tao Luo, David Newmark, David Z. Pan