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DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 10 months ago
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-...
PVLDB
2008
89views more  PVLDB 2008»
15 years 6 months ago
Constrained physical design tuning
Abstract Existing solutions to the automated physical design problem in database systems attempt to minimize execution costs of input workloads for a given storage constraint. In t...
Nicolas Bruno, Surajit Chaudhuri
JOT
2010
126views more  JOT 2010»
15 years 5 months ago
Inferring design patterns using the ReP graph
Abstract Periodic refactoring of a large source code often becomes a necessity especially for long-lived projects. In order to increase maintainability and extensibility of such pr...
Tushar Sharma, Dharanipragada Janakiram
183
Voted
DAC
2008
ACM
16 years 7 months ago
Miss reduction in embedded processors through dynamic, power-friendly cache design
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...
Garo Bournoutian, Alex Orailoglu
DAC
2001
ACM
16 years 7 months ago
MetaCores: Design and Optimization Techniques
Currently, hardware intellectual property (IP) is delivered at vels of abstraction: hard, firm, and soft. In order to further enhance performance, efficiency, and flexibility of I...
Seapahn Meguerdichian, Farinaz Koushanfar, Advait ...