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JSS
2007
75views more  JSS 2007»
15 years 6 months ago
A rationale-based architecture model for design traceability and reasoning
Large systems often have a long life-span and comprise many intricately related elements. The verification and maintenance of these systems require a good understanding of their ...
Antony Tang, Yan Jin, Jun Han
DAC
2006
ACM
16 years 7 months ago
Power-centric design of high-speed I/Os
With increasing aggregate off-chip bandwidths exceeding terabits/second (Tb/s), the power dissipation is a serious design consideration. Additionally, design of I/O links is const...
Hamid Hatamkhani, Frank Lambrecht, Vladimir Stojan...
FMCAD
2009
Springer
16 years 1 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
SUTC
2008
IEEE
16 years 1 months ago
Service-Oriented Design Methodology for Wireless Sensor Networks: A View through Case Studies
— In this paper we discuss the design methodology based on the service-oriented architecture and agile development principles for wireless embedded and sensor networks (WSNs). Th...
Elena Meshkova, Janne Riihijärvi, Frank Oldew...
METRICS
2003
IEEE
16 years 1 days ago
Estimating the Design Effort of Web Applications
Our study focuses on the effort needed for designing Web applications. The effort required for the design phase is an important part of the total development effort of a Web appli...
Luciano Baresi, Sandro Morasca, Paolo Paolini