4359 search results - page 320 / 872 » Automated Pipeline Design |
171
Voted
ASPDAC
2006
ACM
16 years 22 days ago
2006
ACM
- This paper presents an H.264/AVC baseline profile decoder based on a SoC platform design methodology. The overall decoding throughput is increased by optimized software and a ded...
184
click to vote
SBCCI
2005
ACM
16 years 10 days ago
2005
ACM
Flow control mechanisms in Network-on-Chip (NoC) architectures are critical for fast packet propagation across the network and for low idling of network resources. Buffer manageme...
154
click to vote
FPL
2003
Springer
15 years 12 months ago
2003
Springer
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
196
Voted
DATE
2010
IEEE
15 years 12 months ago
2010
IEEE
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...
196
click to vote
FPGA
1997
ACM
15 years 11 months ago
1997
ACM
This paper describes an application in high-performance signal processing using reconfigurable computing engines: a 250 MHz cross-correlator for radio astronomy. Experimental resu...