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ICCD
1997
IEEE
140views Hardware» more  ICCD 1997»
15 years 11 months ago
Parallel-Array Implementations of a Non-Restoring Square Root Algorithm
In this paper, we present a parallel-array implementation of a new non-restoring square root algorithm (PASQRT). The carry-save adder (CSA) is used in the parallel array. The PASQ...
Yamin Li, Wanming Chu
EWSA
2006
Springer
15 years 10 months ago
Component Deployment Evolution Driven by Architecture Patterns and Resource Requirements
Software architectures are often designed with respect to some architecture patterns, like the pipeline and peer-to-peer. These patterns are the guarantee of some quality attribute...
Didier Hoareau, Chouki Tibermacine
FPL
2000
Springer
124views Hardware» more  FPL 2000»
15 years 10 months ago
Balancing Logic Utilization and Area Efficiency in FPGAs
Abstract. In this paper we outline a procedure to determine appropriate partitioning of programmable logic and interconnect area to minimize overall device area across a broad rang...
Russell Tessier, Heather Giza
DAC
1997
ACM
15 years 10 months ago
Formal Verification of a Superscalar Execution Unit
Abstract. Many modern systems are designed as a set of interconnected reactive subsystems. The subsystem verification task is to verify an implementation of the subsystem against t...
Kyle L. Nelson, Alok Jain, Randal E. Bryant
DAC
1995
ACM
15 years 10 months ago
Rephasing: A Transformation Technique for the Manipulation of Timing Constraints
- We introduce a transformation, named rephasing, that manipulates the timing parameters in control-dataflow graphs. Traditionally high-level synthesis systems for DSP have either ...
Miodrag Potkonjak, Mani B. Srivastava