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AIPS
2007
15 years 9 months ago
itSIMPLE 2.0: An Integrated Tool for Designing Planning Domains
A great effort has been made today in the area of Artificial Intelligence for defining reliable automated planning systems that can be applied in real life applications. That le...
Tiago Stegun Vaquero, Victor Romero, Flavio Tonida...
225
Voted
DATE
2007
IEEE
223views Hardware» more  DATE 2007»
16 years 1 months ago
CARAT: a toolkit for design and performance analysis of component-based embedded systems
Solid frameworks and toolkits for design and analysis of embedded systems are of high importance, since they enable early reasoning about critical properties of a system. This pap...
Egor R. V. Bondarev, Michel R. V. Chaudron, Peter ...
GLVLSI
2009
IEEE
125views VLSI» more  GLVLSI 2009»
15 years 10 months ago
Spatial and temporal design debug using partial MaxSAT
Design debug remains one of the major bottlenecks in the VLSI design cycle today. Existing automated solutions strive to aid engineers in reducing the debug effort by identifying ...
Yibin Chen, Sean Safarpour, Andreas G. Veneris, Jo...
FORTE
2001
15 years 8 months ago
Stepwise Design with Message Sequence Charts
Use cases are useful in various stages of the software process. They are very often described using text that has to be interpreted by system designers. This could lead to implemen...
Ferhat Khendek, Stephan Bourduas, Daniel Vincent
GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
15 years 6 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...