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ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
16 years 20 days ago
A near optimal deblocking filter for H.264 advanced video coding
- We propose a near optimal hardware architecture for deblocking filter in H.264/MPEG-4 AVC. We propose a novel filtering order and a data reuse strategy that result in significant...
Shen-Yu Shih, Cheng-Ru Chang, Youn-Long Lin
IEEEPACT
2003
IEEE
15 years 12 months ago
Picking Statistically Valid and Early Simulation Points
Modern architecture research relies heavily on detailed pipeline simulation. Simulating the full execution of an industry standard benchmark can take weeks to months to complete. ...
Erez Perelman, Greg Hamerly, Brad Calder
DOCENG
2003
ACM
15 years 12 months ago
Lazy XSL transformations
We introduce a lazy XSLT interpreter that provides random access to the transformation result. This allows efficient pipelining of transformation sequences. Nodes of the result tr...
Steffen Schott, Markus L. Noga
DSD
2002
IEEE
73views Hardware» more  DSD 2002»
15 years 11 months ago
Implementation of a Streaming Execution Unit
The Complex Streamed Instruction (CSI) set is an instruction set extension targeted at multimedia applications. CSI instructions process two-dimensional data streams stored in mem...
Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vass...
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
15 years 11 months ago
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
Ho-Seop Kim, James E. Smith