4359 search results - page 259 / 872 » Automated Pipeline Design |
147
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ICIP
2007
IEEE
16 years 8 months ago
2007
IEEE
The in-loop deblocking filter contains highly adaptive processing on both sample level and block edge level, which inevitably appears in the loop kernel of the algorithm. Therefor...
165
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VIS
2009
IEEE
16 years 7 months ago
2009
IEEE
Visualization is essential for understanding the increasing volumes of digital data. However, the process required to create insightful visualizations is involved and time consumin...
170
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DSN
2007
IEEE
16 years 1 months ago
2007
IEEE
Synchronous circuits are typically clocked considering worst case timing paths so that timing errors are avoided under all circumstances. In the case of a pipelined processor, thi...
189
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IEEEPACT
2007
IEEE
16 years 1 months ago
2007
IEEE
In this paper we propose a unified architectural support that can be used flexibly for either soft-error protection or software bug detection. Our approach is based on dynamically...
157
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DSN
2006
IEEE
16 years 22 days ago
2006
IEEE
Protecting the register value and its data buses is crucial to reliable computing in high-performance microprocessors due to the increasing susceptibility of CMOS circuitry to sof...