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VLSID
2005
IEEE
107views VLSI» more  VLSID 2005»
16 years 7 days ago
Design, Testing, and Applications of Digital Microfluidics-Based Biochips
Microfluidics-based biochips offer a promising platform for massively parallel DNA analysis, automated drug discovery, and real-time biomolecular recognition. The first part of th...
Krishnendu Chakrabarty
SIPS
2008
IEEE
16 years 1 months ago
Low-complexity high-speed 4-D TCM decoder
This paper presents a low-complexity, high-speed 4-dimensional 8-ary Phase Shift Keying Trellis Coded Modulation (4-D 8PSK TCM) decoder. In the design, an efficient architecture f...
Jinjin He, Zhongfeng Wang, Huaping Liu
ICMCS
2005
IEEE
104views Multimedia» more  ICMCS 2005»
16 years 8 days ago
A High-Performance Memory-Efficient Architecture of the Bit-Plane Coder in JPEG 2000
The paper presents a high-performance architecture of the bit-plane coder for the embedded block coding algorithm in JPEG 2000. The architecture adopts a pipeline structure and is...
Grzegorz Pastuszak
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
15 years 12 months ago
High-speed VLSI architecture for parallel Reed-Solomon decoder
—This paper presents high-speed parallel Reed–Solomon (RS) (255,239) decoder architecture using modified Euclidean algorithm for the high-speed multigigabit-per-second fiber op...
Hanho Lee
VLSID
1996
IEEE
133views VLSI» more  VLSID 1996»
15 years 10 months ago
Allocation and Binding in Data Path Synthesis Using a Genetic Algorithm Approach
A technique for allocatzon and binding for data path synthesis (DPS) using a Genetic Algorithm (GA) approach has been developed. The proposed genetic algorithm uses a non-conventi...
Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy G...