Sciweavers

16206 search results - page 2808 / 3242
» At Issue
Sort
View
MICRO
2007
IEEE
144views Hardware» more  MICRO 2007»
16 years 1 months ago
Process Variation Tolerant 3T1D-Based Cache Architectures
Process variations will greatly impact the stability, leakage power consumption, and performance of future microprocessors. These variations are especially detrimental to 6T SRAM ...
Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Bro...
MOBIQUITOUS
2007
IEEE
16 years 1 months ago
Optimal Relay Node Fault Recovery
—Topology control problems are concerned with the assignment of power levels to the nodes of an ad-hoc network so as to maintain a specified network topology while minimizing th...
Fei Che, Liang Zhao, Errol L. Lloyd
NDSS
2007
IEEE
16 years 1 months ago
Attribute-Based Publishing with Hidden Credentials and Hidden Policies
With Hidden Credentials Alice can send policyencrypted data to Bob in such a way that he can decrypt the data only with the right combination of credentials. Alice gains no knowle...
Apu Kapadia, Patrick P. Tsang, Sean W. Smith
PDP
2007
IEEE
16 years 1 months ago
Improving the Development Process for CSE Software
Scientific and engineering programming has been around since the beginning of computing, often being the driving force for new system development and innovation. At the same time...
Michael A. Heroux, James M. Willenbring, Michael N...
RSP
2007
IEEE
143views Control Systems» more  RSP 2007»
16 years 1 months ago
Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs
Multiprocessor Systems-on-Chip (MPSoCs) is a trend in VLSI design, since they minimize the “design crisis” (gap between silicon technology and actual SoC design capacity) and ...
Ewerson Carvalho, Ney Calazans, Fernando Moraes
« Prev « First page 2808 / 3242 Last » Next »