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VLSID
2007
IEEE
120views VLSI» more  VLSID 2007»
16 years 7 months ago
Statistical Leakage and Timing Optimization for Submicron Process Variation
Leakage power is becoming a dominant contributor to the total power consumption and dual-Vth assignment is an efficient technique to decrease leakage power, for which effective de...
Yuanlin Lu, Vishwani D. Agrawal
VLSID
2002
IEEE
149views VLSI» more  VLSID 2002»
16 years 7 months ago
Functional Partitioning for Low Power Distributed Systems of Systems-on-a-Chip
In this paper, we present a functional partitioning method for low power real-time distributed embedded systems whose constituent nodes are systems-on-a-chip (SOCs). The systemlev...
Yunsi Fei, Niraj K. Jha
HPCA
2007
IEEE
16 years 7 months ago
Colorama: Architectural Support for Data-Centric Synchronization
With the advent of ubiquitous multi-core architectures, a major challenge is to simplify parallel programming. One way to tame one of the main sources of programming complexity, n...
Luis Ceze, Pablo Montesinos, Christoph von Praun, ...
HPCA
2005
IEEE
16 years 7 months ago
A Small, Fast and Low-Power Register File by Bit-Partitioning
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
Masaaki Kondo, Hiroshi Nakamura
POPL
2006
ACM
16 years 7 months ago
Modular set-based analysis from contracts
In PLT Scheme, programs consist of modules with contracts. The latter describe the inputs and outputs of functions and objects via predicates. A run-time system enforces these pre...
Philippe Meunier, Robert Bruce Findler, Matthias F...