Sciweavers

4287 search results - page 522 / 858
» Assessing Architectural Complexity
Sort
View
181
Voted
IEEEPACT
2006
IEEE
16 years 25 days ago
Adaptive reorder buffers for SMT processors
In SMT processors, the complex interplay between private and shared datapath resources needs to be considered in order to realize the full performance potential. In this paper, we...
Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev
DAC
2006
ACM
16 years 23 days ago
Buffer memory optimization for video codec application modeled in Simulink
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Ami...
182
Voted
DAC
2006
ACM
16 years 23 days ago
Automated design of pin-constrained digital microfluidic arrays for lab-on-a-chip applications*
Microfluidics-based biochips, also referred to as lab-on-a-chip (LoC), are devices that integrate fluid-handling functions such as sample preparation, analysis, separation, and de...
William L. Hwang, Fei Su, Krishnendu Chakrabarty
179
Voted
ISLPED
2006
ACM
100views Hardware» more  ISLPED 2006»
16 years 23 days ago
Selective writeback: exploiting transient values for energy-efficiency and performance
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to increase the instruction throughput. The high complexity and power dissipation of ...
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev,...
NETGAMES
2006
ACM
16 years 23 days ago
On correctness of scalable multi-server state replication in online games
Massively Multiplayer Online Games (MMOG) require novel, scalable network architectures for a high amount of participating players in huge game worlds. Consequently, new and compl...
Jens Müller 0004, Andreas Gössling, Serg...