The purpose of this paper is to propose visual models for a web application using Java and XML related technologies. We consider a web application that uses 3tier architecture and...
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
We propose an extension to current view-based mediator systems called model-based mediation, in which views are defined and executed at the level of conceptual models (CMs) rather...
This paper presents MINFLOTRANSIT, a new transistor sizing tool for fast sizing of combinational circuits with minimal cost. MINFLOTRANSIT is an iterative relaxation based tool th...
Vijay Sundararajan, Sachin S. Sapatnekar, Keshab K...