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» Assessing Architectural Complexity
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DAC
2004
ACM
16 years 7 months ago
Synthesizing interconnect-efficient low density parity check codes
Error correcting codes are widely used in communication and storage applications. Codec complexity has usually been measured with a software implementation in mind. A recent hardw...
Marghoob Mohiyuddin, Amit Prakash, Adnan Aziz, Way...
VLSID
2003
IEEE
126views VLSI» more  VLSID 2003»
16 years 7 months ago
Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation
Functional decomposition is a process of splitting a complex circuit into smaller sub-circuits. This paper deals with the problem of determining the set of best free and bound var...
Muthukumar Venkatesan, Henry Selvaraj
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
16 years 7 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
CHI
2001
ACM
16 years 7 months ago
DataTiles: a modular platform for mixed physical and graphical interactions
The DataTiles system integrates the benefits of two major interaction paradigms: graphical and physical user interfaces. Tagged transparent tiles are used as modular construction ...
Jun Rekimoto, Brygg Ullmer, Haruo Oba
DATE
2009
IEEE
116views Hardware» more  DATE 2009»
16 years 1 months ago
A high-level debug environment for communication-centric debug
—A large part of a modern SOC’s debug complexity resides in the interaction between the main system components. ion-level debug moves the abstraction level of the debug process...
Kees Goossens, Bart Vermeulen, Ashkan Beyranvand N...