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APCSAC
2000
IEEE
15 years 11 months ago
Micro-Threading: A New Approach to Future RISC
This paper briefly reviews the current research into RISC microprocessor architecture, which now seems to be so complex as to make the acronym somewhat of an oxymoron. In response...
Chris R. Jesshope, Bing Luo
IWPC
1998
IEEE
15 years 11 months ago
Pattern Visualization for Software Comprehension
Cognitive science emphasizes the strength of visual formalisms for human learning and problem solving. In software engineering, a clear, visual presentation of a system's arc...
Reinhard Schauer, Rudolf K. Keller
APCSAC
2004
IEEE
15 years 10 months ago
Validating Word-Oriented Processors for Bit and Multi-word Operations
We examine secure computing paradigms to identify any new architectural challenges for future general-purpose processors. Some essential security functions can be provided by diffe...
Ruby B. Lee, Xiao Yang, Zhijie Shi
CF
2008
ACM
15 years 8 months ago
Multi-terabit ip lookup using parallel bidirectional pipelines
To meet growing terabit link rates, highly parallel and scalable architectures are needed for IP lookup engines in next generation routers. This paper proposes an SRAM-based multi...
Weirong Jiang, Viktor K. Prasanna
ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
15 years 8 months ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...