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DATE
2005
IEEE
119views Hardware» more  DATE 2005»
16 years 7 days ago
Functional Validation of System Level Static Scheduling
Increase in system level modeling has given rise to a need for efficient functional validation of models above cycle accurate level. This paper presents a technique for comparing...
Samar Abdi, Daniel D. Gajski
DATE
2005
IEEE
118views Hardware» more  DATE 2005»
16 years 7 days ago
An Iterative Algorithm for Battery-Aware Task Scheduling on Portable Computing Platforms
In this work we consider battery powered portable systems which either have Field Programmable Gate Arrays (FPGA) or voltage and frequency scalable processors as their main proces...
Jawad Khan, Ranga Vemuri
DILS
2004
Springer
16 years 12 hour ago
Links and Paths through Life Sciences Data Sources
An abundance of biological data sources contain data on classes of scientific entities, such as genes and sequences. Logical relationships between scientific objects are implemen...
Zoé Lacroix, Hyma Murthy, Felix Naumann, Lo...
184
Voted
IPPS
2002
IEEE
15 years 11 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
184
Voted
ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
15 years 11 months ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha