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INFOCOM
2007
IEEE
16 years 18 days ago
On the Extreme Parallelism Inside Next-Generation Network Processors
Next-generation high-end Network Processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an e...
Lei Shi, Yue Zhang 0006, Jianming Yu, Bo Xu, Bin L...
ALGOSENSORS
2007
Springer
16 years 15 days ago
Maximal Breach in Wireless Sensor Networks: Geometric Characterization and Algorithms
e for abstract modeling, algorithmic design and analysis to achieve provably efficient, scalable and fault-tolerant realizations of such huge, highly-dynamic, complex, non-conventi...
Anirvan DuttaGupta, Arijit Bishnu, Indranil Sengup...
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
16 years 9 days ago
Silicon neurons that inhibit to synchronize
Abstract—We present a silicon neuron that uses shunting inhibition (conductance-based) with a synaptic rise-time to achieve synchrony. Synaptic rise-time promotes synchrony by de...
John V. Arthur, Kwabena Boahen
SPAA
2006
ACM
16 years 7 days ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
VISUALIZATION
2005
IEEE
15 years 12 months ago
Streaming Meshes
Recent years have seen an immense increase in the complexity of geometric data sets. Today’s gigabyte-sized polygon models can no longer be completely loaded into the main memor...
Martin Isenburg, Peter Lindstrom