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ASAP
2005
IEEE
133views Hardware» more  ASAP 2005»
16 years 3 days ago
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
CGO
2005
IEEE
16 years 3 days ago
Practical and Accurate Low-Level Pointer Analysis
Pointer analysis is traditionally performed once, early in the compilation process, upon an intermediate representation (IR) with source-code semantics. However, performing pointe...
Bolei Guo, Matthew J. Bridges, Spyridon Triantafyl...
ECRTS
2005
IEEE
16 years 3 days ago
Non-Preemptive Interrupt Scheduling for Safe Reuse of Legacy Drivers in Real-Time Systems
Low-level support of peripheral devices is one of the most demanding activities in a real-time operating system. In fact, the rapid development of new interface boards causes a tr...
Tullio Facchinetti, Giorgio C. Buttazzo, Mauro Mar...
ISCA
2005
IEEE
88views Hardware» more  ISCA 2005»
16 years 2 days ago
Architecture for Protecting Critical Secrets in Microprocessors
We propose “secret-protected (SP)” architecture to enable secure and convenient protection of critical secrets for a given user in an on-line environment. Keys are examples of...
Ruby B. Lee, Peter C. S. Kwan, John Patrick McGreg...
ISCAS
2005
IEEE
103views Hardware» more  ISCAS 2005»
16 years 2 days ago
Why area might reduce power in nanoscale CMOS
— In this paper we explore the relationship between power and area. By exploiting parallelism (and thus using more area) one can reduce the switching frequency allowing a reducti...
Paul Beckett, S. C. Goldstein