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ICCAD
1992
IEEE
153views Hardware» more  ICCAD 1992»
15 years 10 months ago
Efficient techniques for inductance extraction of complex 3-D geometries
In this paper we describe combining a mesh analysis equation formulation technique with a preconditioned GORES matrix solution algorithm to accelerate the determination of inducta...
Mattan Kamon, Michael J. Tsuk, C. Smithhisler, Jac...
EUROPAR
2007
Springer
15 years 10 months ago
Optimizing Chip Multiprocessor Work Distribution Using Dynamic Compilation
How can sequential applications benefit from the ubiquitous next generation of chip multiprocessors (CMP)? Part of the answer may be a dynamic execution environment that automatica...
Jisheng Zhao, Matthew Horsnell, Ian Rogers, Andrew...
CAV
2004
Springer
136views Hardware» more  CAV 2004»
15 years 10 months ago
JNuke: Efficient Dynamic Analysis for Java
JNuke is a framework for verification and model checking of Java programs. It is a novel combination of run-time verification, explicit-state model checking, and counter-example ex...
Cyrille Artho, Viktor Schuppan, Armin Biere, Pasca...
CSFW
2004
IEEE
15 years 10 months ago
By Reason and Authority: A System for Authorization of Proof-Carrying Code
We present a system, BLF, that combines an authorization logic based on the Binder language with a logical framework, LF, able to express semantic properties of programs. BLF is a...
Nathan Whitehead, Martín Abadi, George C. N...
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 10 months ago
Communication Analysis for System-On-Chip Design
In this paper we present an approach for analysis of systems of parallel, communicating processes for SoC design. We present a method to detect communications that synchronize the...
Axel Siebenborn, Oliver Bringmann, Wolfgang Rosens...