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DATE
2005
IEEE
107views Hardware» more  DATE 2005»
16 years 5 days ago
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...
César A. M. Marcon, Ney Laert Vilar Calazan...
SAC
2005
ACM
16 years 3 days ago
Where web engineering tool support ends: building usable websites
In this paper, two of the currently available Web Engineering solutions (UWE and OO-H) are analysed with regard to the question whether websites created with them and their tools ...
Richard Atterer
MEMOCODE
2003
IEEE
15 years 11 months ago
MoDe: A Method for System-Level Architecture Evaluation
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
Jan Romberg, Oscar Slotosch, Gabor Hahn
SIMUTOOLS
2008
15 years 8 months ago
Transforming sources to petri nets: a way to analyze execution of parallel programs
Model checking is a suitable formal technique to analyze parallel programs' execution in an industrial context because automated tools can be designed and operated with very ...
Jean-Baptiste Voron, Fabrice Kordon
ICDE
1998
IEEE
70views Database» more  ICDE 1998»
16 years 8 months ago
Point-Versus Interval-Based Temporal Data Models
The association of timestamps with various data items such as tuples or attribute values is fundamental to the management of time-varying information. Using intervals in timestamp...
Michael H. Böhlen, Renato Busatto, Christian ...