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IPPS
2006
IEEE
16 years 17 days ago
Quantifying and reducing the effects of wrong-path memory references in cache-coherent multiprocessor systems
High-performance multiprocessor systems built around out-of-order processors with aggressive branch predictors execute many memory references that turn out to be on a mispredicted...
Resit Sendag, Ayse Yilmazer, Joshua J. Yi, Augustu...
IROS
2006
IEEE
165views Robotics» more  IROS 2006»
16 years 17 days ago
Grounded Situation Models for Robots: Where words and percepts meet
— Our long-term objective is to develop robots that engage in natural language-mediated cooperative tasks with humans. To support this goal, we are developing an amodal represent...
Nikolaos Mavridis, Deb Roy
IROS
2006
IEEE
162views Robotics» more  IROS 2006»
16 years 17 days ago
Efficiency Improvement in Monte Carlo Localization through Topological Information
- Monte Carlo localization is known to be one of the most reliable methods for pose estimation of a mobile robot. Many studies have been conducted to improve performance of MCL. Al...
Tae-Bum Kwon, Ju-Ho Yang, Jae-Bok Song, Woojin Chu...
MICRO
2006
IEEE
82views Hardware» more  MICRO 2006»
16 years 17 days ago
Yield-Aware Cache Architectures
One of the major issues faced by the semiconductor industry today is that of reducing chip yields. As the process technologies have scaled to smaller feature sizes, chip yields ha...
Serkan Ozdemir, Debjit Sinha, Gokhan Memik, Jonath...
SAINT
2006
IEEE
16 years 16 days ago
Fluid-Based Analysis of a Network with DCCP Connections and RED Routers
In this paper, we model DCCP congestion control mechanism and RED as independent discrete-time systems using fluid-flow approximation. By interconnecting DCCP connections and RE...
Hiroyuki Hisamatsu, Hiroyuki Ohsaki, Masayuki Mura...