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DAC
2002
ACM
16 years 7 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
WSE
2006
IEEE
16 years 14 days ago
Modeling Request Routing in Web Applications
For web applications, determining how requests from a web page are routed through server components can be time-consuming and error-prone due to the complex set of rules and mecha...
Minmin Han, Christine Hofmeister
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
15 years 10 months ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...
BIRTHDAY
2010
Springer
15 years 5 months ago
The Architecture Description Language MoDeL
m, modules, types and operations), different kinds of abstractions (functional/data, types/objects etc.) without falling into a loose collection of diagram languages. Considering a...
Peter Klein
CAV
2009
Springer
155views Hardware» more  CAV 2009»
16 years 7 months ago
Better Quality in Synthesis through Quantitative Objectives
Abstract. Most specification languages express only qualitative constraints. However, among two implementations that satisfy a given specification, one may be preferred to another....
Roderick Bloem, Krishnendu Chatterjee, Thomas A. H...