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VLSID
2008
IEEE
142views VLSI» more  VLSID 2008»
16 years 1 months ago
Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
ISMAR
2007
IEEE
16 years 1 months ago
A System Architecture for Ubiquitous Tracking Environments
Ubiquitous tracking setups, covering large tracking areas with many heterogeneous sensors of varying accuracy, require dedicated middleware to facilitate development of stationary...
Manuel Huber, Daniel Pustka, Peter Keitler, Floria...
JCDL
2003
ACM
221views Education» more  JCDL 2003»
16 years 3 days ago
The Interactive Shared Educational Environment: User Interface, System Architecture and Field Study
The user interface and system architecture of a novel Interactive Shared Educational Environment (ISEE) are presented. Based on a lightweight infrastructure, ISEE enables relative...
Xiangming Mu, Gary Marchionini, Amy Pattee
HPCC
2009
Springer
15 years 11 months ago
A Quantitative Study of Memory System Interference in Chip Multiprocessor Architectures
—The potential for destructive interference between running processes is increased as Chip Multiprocessors (CMPs) share more on-chip resources. We believe that understanding the ...
Magnus Jahre, Marius Grannæs, Lasse Natvig
MKWI
2008
153views Business» more  MKWI 2008»
15 years 8 months ago
A Reference Architecture for Semantic Business Process Management Systems
: Semantic Business Process Management (SBPM) enhances BPM with semantic technologies in order to increase the degree of automation in the BPM lifecycle and help in bridging the ga...
Dimka Karastoyanova, Tammo van Lessen, Frank Leyma...