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173
Voted
DAC
2005
ACM
16 years 7 months ago
2005
ACM
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
196
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
174
Voted
DAC
2006
ACM
16 years 7 months ago
2006
ACM
In this paper we present a generic interconnect fabric for transaction level modelling tackeling three major aspects. First, a review of the bus and IO structures that we have ana...
170
Voted
DAC
2006
ACM
16 years 7 months ago
2006
ACM
Multimedia SoCs are characterized by a main controller that directs the activity of several cores, each of which is in charge of a stage in the processing of a media stream. The v...
197
Voted
DAC
2006
ACM
16 years 7 months ago
2006
ACM
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...