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ASPLOS
2009
ACM
16 years 7 months ago
Accelerating critical section execution with asymmetric multi-core architectures
To improve the performance of a single application on Chip Multiprocessors (CMPs), the application must be split into threads which execute concurrently on multiple cores. In mult...
M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi...
TITS
2002
148views more  TITS 2002»
15 years 6 months ago
A self-describing data transfer model for ITS applications
The wide variety of remote sensors used in Intelligent Transportation Systems (ITS) applications (loops, probe vehicles, radar, cameras, etc.) has created a need for general method...
Daniel J. Dailey, Stuart Maclean, Fritz W. Cathey,...
EWSA
2006
Springer
15 years 10 months ago
Modes for Software Architectures
Abstract. Modern systems are heterogeneous, geographically distributed and highly dynamic since the communication topology can vary and the components can, at any moment, connect t...
Dan Hirsch, Jeff Kramer, Jeff Magee, Sebasti&aacut...
MEMOCODE
2008
IEEE
16 years 1 months ago
Virtual prototyping AADL architectures in a polychronous model of computation
While synchrony and asynchrony are two distinct concepts of concurrency theory, effective and formally defined embedded system design methodologies usually mix the best from both...
Ma Yue, Jean-Pierre Talpin, Thierry Gautier
DAC
2004
ACM
16 years 8 days ago
Extending the transaction level modeling approach for fast communication architecture exploration
System-on-Chip (SoC) designs are increasingly becoming more complex. Efficient on-chip communication architectures are critical for achieving desired performance in these systems....
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...