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IJES
2008
83views more  IJES 2008»
15 years 6 months ago
Evaluating memory architectures for media applications on Coarse-grained Reconfigurable Architectures
Reconfigurable ALU Array (RAA) architectures--representing a popular class of Coarse-grained Reconfigurable Architectures--are gaining in popularity especially for media applicati...
Jong-eun Lee, Kiyoung Choi, Nikil Dutt
ICCD
2007
IEEE
132views Hardware» more  ICCD 2007»
16 years 3 months ago
Post-layout comparison of high performance 64b static adders in energy-delay space
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
Sheng Sun, Carl Sechen
INTEGRATION
2008
183views more  INTEGRATION 2008»
15 years 6 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...
ICSE
1997
IEEE-ACM
15 years 11 months ago
Argo: A Design Environment for Evolving Software Architectures
Software architectures evolve as the result of numerous, interrelated design decisions. At any point in an architecture’s evolution, current decisions can critically affect alte...
Jason E. Robbins, David M. Hilbert, David F. Redmi...
DAC
2002
ACM
16 years 7 months ago
A framework for evaluating design tradeoffs in packet processing architectures
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simul...
Lothar Thiele, Matthias Gries, Samarjit Chakrabort...