23406 search results - page 4376 / 4682 » Architecture, Design, Implementation |
159
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DAC
2000
ACM
16 years 7 months ago
2000
ACM
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...
170
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DAC
2003
ACM
16 years 7 months ago
2003
ACM
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) th...
165
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DAC
2003
ACM
16 years 7 months ago
2003
ACM
While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
193
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
ion of Assembler Programs for Symbolic Worst Case Execution Time Analysis Tobias Schuele Tobias.Schuele@informatik.uni-kl.de Klaus Schneider Klaus.Schneider@informatik.uni-kl.de Re...
146
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...